A stepping valve system has been proposed before and proved to be feasible. The stepping valve move perpendicular to the piston, thereby avoiding piston-valve collisions associated with interference engines. In this study, the proposed Stepping Valve Control Unit, SVCU, was integrated with the conventional Engine Control Unit, ECU, of a simple SI engine. The resulting Integrated Engine Control Unit, IECU, as it is called, simplified the design of the ECU. The integration involved combining the basic fuel injector and sparking controls with the SVCU. The camshaft and crankshaft sensors were replaced by a Piston Direction Sensor, PDS. The PDS is an optical sensor, which works in conjunction with a gray coded trigger wheel to relay information to the IECU. The IECU was simulated using Quartus II design software. The hardware implementation of the IECU was done using EPM7128SL FPGA contained within the UP1 Altera Development Board. The behavior of the IECU was expected.


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Traditionally, valve events for an internal combustion engine are controlled by a camshaft driven by a crankshaft through a cam belt/chain [1], [2]. The shape and positioning of the cam lobes constitutes valve timing. Variable valve timing can be achieved by using cam changing system like Honda’s VTEC, vane phasor like Toyota VVT-I, or electromagnetic actuators as in experimental vehicles. Examples are shown in Fig. 1 [3], [4].

Fig. 1. (a) Vane phasor VVT. (b) Phasor timing diagram.

Notice that these systems still use the poppet valve which is prone to piston interference. In view of that, an electronically controlled stepping valve, ECSV has being proposed in subsequent case studies [5]. The ECSV exhibits no interference between the stepping valve and the piston. It is software controlled, giving the required flexibility of controlling valve events throughout the entire RPM range [6]. During those case studies, various models of the valve events controlling algorithms were successfully built and tested. In [5], one model of a stepping valve control unit, SVCU, was successfully built and tested to implement variable valve timing on the ECSV system.

In the study, the SVCU was integrated with the conventional engine control unit, ECU, of a simple single cylinder engine. The resulting integrated engine control unit, IECU, harmonized the design of the overall ECU. This integration involved combining the basic fuel injector and sparking controls with the SVCU. The camshaft and crankshaft sensors were replaced by a piston direction sensor, PDS. The PDS is an optical sensor, which works in conjunction with a gray coded trigger wheel to relay information to the IECU. The IECU includes added functionalities like various modes of operation [5].

Electronically Controlled SteppingValve—A Review

Fig. 2 shows the radial and axial ECSV systems as discussed in previous study cases [5], [7]. Fig. 2a shows the valve system with 4 holes on it, v1, v2, v3 and v4. Each hole goes through 3 states: intake (for the intake stroke), exhaust (for the exhaust stroke) and closed (for the compression and power stroke). Each hole acts like a separate valve, experiencing those 3 states. So, 4 holes go through 12 states collectively. The stator switches through a 12-state pattern, linking each hole, in turn to the 12 channels on the cylinder head. The 12 channels consists of exhaust channels (e1 to e4), intake channels (i1 to i4) and closed channels (c1 to c4). The piston direction sensor, PDS, will notify the stepping valve control unit, SVCU, if the piston is going up (PDS = 1 for compression/exhaust) or down (PDS = 0 for power/intake). Since the valve motion is independent of the crank position, the SVCU can initiate the auto cycle from any point, just guided by the value of PDS.

Fig. 2. (a) ECSV radial system, (b) ECSV axial system.

The axial system of Fig. 2b, consists of pancake-like rotor and stator. Unlike the radial assembly where the rotor slide inside the stator, the axial rotor sits on top of the stator. Operation-wise, the two systems are identical [5].

Integrated Engine Control Unit withVariable Timing


Ideally, valve events occur at piston dead centres. But as the engine speed increases, the valves open earlier and close later than the piston dead centres in order to take advantage of fast moving gases, and hence improve engine efficiency [8]–[10].

The exhaust valve opening, EVO, will occur a few degrees before bottom dead centre, BBDC. The exhaust valve closing, EVC, will occur a few degrees after top dead centre, ATDC. The intake valve opening, IVO, will occur a few degrees BTDC and intake valve closing, IVC will occur a few degrees ABDC. Implementing these valve events (IVO, IVC, EVO, and EVC) will involve triggering them at the right time during the auto cycle.

Variable Timing on a Stepping Valve System

Just like with valves, variable timing is also applicable to sparking and fuel injection, using advance/retard techniques [11]. Fuel injection can be can occur in the intake phase or compression phase, as in a GDI engine [12]. In this section, we discuss how to implement variable timing on cylinder events (IVO, IVC, EVO, EVC, sparking and fuel injection).

Fig. 4 shows the waveform implementation of variable timing for all the cylinder events. In a conventional engine, the ECU counts the number of teeth on the toothed trigger wheel (or reluctor wheel) to determine the crank angle, [13]. For the proposed ECSV system, the crank angle is determined via interpolation using the period, T of one revolution of the crankshaft. The PDS trigger wheel is devided into 360 virtual angles. Using an engine speed of 24000 RPM (i.e., 400 rev/s), T = 1/400 s=0.0025 s. Therefore crank angle (time for (1/360)th of a revolution) = 0.0025/360 = 6.9 × 10−6 sec. This translates to a frequency of 1/(6.9×10−6 s) = 144 kHz. This is the frequency to generate 1° pulses @ 24000 RPM. Fig. 4 shows the logic diagram of the IECU as implemented in Quartus II. The crank angle calculator logic composes of a /360 cyclic counter, Rev Counter, Data Register and a Synchronous Down Counter. The Rev Counter registers the number of revolutions made by the trigger wheel. (The /360 Cyclic Counter defines the time period of a revolution). Each RPM signal (shown in Fig. 3), marks subsequent revolutions. The negative going edge of RPM resets both the /360 Cyclic Counter and Rev Counter for a new cycle. Before being reset, the contents of the Rev Counter are transferred into the Data Register using the positive going edge of RPM signal. If the RPM signal rate is equivalent to 144 kHz, the /360 Cyclic Counter will cycle once and Rev Counter will register value 1. This will be loaded to the Synchrous Down Counter (via Data Register). So, the Synchronous Down Counter will down count once and produce a ZERO¯ output. Therefore crank angle frequency = 144 kHz.

Fig. 3. Digital logic realisation of the IECU.

Fig. 4. Variable timing for cylinder events.

Suppose an engine has a rev speed of 72000 RPM (half speed of 24000 RPM). The /360 Cyclic Counter will make 2 revolutions between subsequent RPM signals. This value of 2 will be loaded to the Synchronous Down Counter so that the crank angle (of 1°) is delivered at half the frequency of 144 kHz. Thus the time for the crank angle will always be 1/360 of the period T for any given RPM.

The event driven Auto State Generator, generate states which are required by the PDS signal processor, to generate the trigger signals EVCt, IVOt, IPWt, Spkt and EVOt. IVOt is generated by IVO output using a pulse logic.

A typical lowest engine speed is 600 RPM. This translates to 24000/600 = 40 = 1010002. With 6 bits (all 1’s), we have 63. This back translates to a lowest speed of 24000/63 = 381 RPM! This is not a practical engine speed. 5 bits gives an RPM of 24000/31 = 750, which is clearly not the lowest either. So we use 6 bits to define the dimension of the Rev Counter and other associated counting devices (see Fig. 4).

Analysis of Cylinder Events

All cylinder events are triggered by their respective event counters (Fig. 4). All event counters are down counters. Each one of these event counters have a look-up table (LUT) to load preset data from. Each counter can advance or retard the signal it is controlling, by loading the right amount of delay.

An advanced (early) or retarded (late) EVO may be desired depending on the driving conditions (mode). A full load condition will require an early EVO event in order to drop cylinder pressure to exhaust back pressure [14]. The EVO event can be implemented using an EVO-Counter which is triggered at the beginning of the power stroke (i.e., at TDC). The EVO-Counter is a /360 counter which is able to count below 180 for an advance or above 180 for a retard operation. Fig. 5 shows a Quartus II example of an EVO event counter. The first state, Sn, is equivalent to 360°. The last state, S0 is equivalent to 0°. The value of the Rev Counter will be used as an address for EVO LUT. In this location, the counter value stored is 360 − (180 + 57) = 123. So, the loading state, Si = 123 (equivalent to an advance angle of 57°). The states Sn→Si+1 are referred to as ‘wasted’ or unused states. During advance/retard stage (Si→Sk), the EVO counter will be down counting using crank angle clock, clkca (selected by the clock multiplexer, clk-mux. The generated EVO output is used as the control input of the clk-mux). From Sk→S1, the valve will be closing. The EVO coil response time, tcoil, has a contant value of 2 ms (determined from previous study cases [5]). We can’t use clkca here since it is a function of RPM. the EVO output will be high at this time, so the real time clock, clkrt, will be selected so that the coil will be given the required 2 ms to react. So the valve will open 57° ahead of the exhaust stroke as required. The exhaust stroke is positioned at 180° after the trigger (i.e., at BDC).

Fig. 5. FSM implementation of cylinder event counters using quartus II.

The other two valve events, IVO and EVC are triggered at BDC. IVO occurs towards the end of the exhaust stroke or just after the intake stroke. EVC occurs before or after TDC. The IVC event on the other hand, is triggered by IVO. It occurs before or after BDC. Just like EVO, a /360 event counter will be appropriate for these valve events, and their state diagrams will be identical to that of EVO.

The other remaining cylinder events, IPW and Spk, are also triggered at BDC. However, each one of these events use a /720 event counter. This is because of the following reason. The spark function, spk, is initialised at the beginning of the exhaust stroke and used in the power stroke, which occurs between 540° and 720° after triggering. Also this gives room for wasted spark implementation (sparking in exhaust and power phases to completely burn off exhaust gases). The IPW event can be implemented in intake stroke or power stroke (as in GDI engine). Notice that the LUT data for IVC and IPW functions comes is the accelerator position data. When driver press on accelrator, more fuel is injected (pulse width increases), and more air is required for combustion (IVC) [15], [16].

The state diagrams for the IPW Spk functions resemble that of Fig. 5. In case of the IPW function, states Sk→S1 represents the injector pulse width, and for Spk function, these states represent the time required to charge up the coil, known as dwell time, cdt. At state S0, Spk will be zero, and the spark coil will discharge, delivering a spark. Note that cdt is calculated so that the coil doesn’t overcharge, a condition which results in coil damage as in some conventional systems [17]. There is no restriction in discharge time as firing will stop once charge is exhausted.

Discussions and Future Directions

We have seen how variable timing can be implemented on cylinder events using interpolated virtual angles. Cylinder event counters are loaded with advance/retard data, so that they count down to the required advance/retard angle. Thus the counters induce a delay before the cylinder event occurs. The delay is implemented through a down counter clocked by clkca during the advance/retard stage and by clkrt during the coil reaction time stage. The proposed IECU worked as expected. The advance/retard calculator presented accurate results, better than the conventional toothed trigger wheel, which has less resolution and is prone to output interference at high RPM.

For future development, the event counters can be replaced by a single cylinder event counter, driving a single LUT, for a simplified design look. To extend this design to a multi-cylinder engine, a firing order is introduced. This basically involves ‘duplicating’ cylinder event functions, resulting in increased external outputs.


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